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Liquid Crystal Display and Backlight Integrated Controller
The MC34270 and MC34271 are low power dual switching voltage regulators, specifically designed for handheld and laptop applications, to provide several regulated output voltages using a minimum of external parts. Two uncommitted switching regulators feature a very low standby bias current of 5.0 A, and an operating current of 7.0 mA capable of supplying output currents in excess of 200 mA. Both devices have three additional features. The first is an ELD Output that can be used to drive a backlight or a liquid crystal display. The ELD output frequency is the clock divided by 256. The second feature allows four additional output bias voltages, in specific proportions to VB, one of the switching regulated output voltages. It allows use of mixed logic circuitry and provides a voltage bias for N-Channel load control MOSFETst. The third feature is an Enable input that allows a logic level signal to turn-"off" or turn-"on" both switching regulators. Due to the low bias current specifications, these devices are ideally suited for battery powered computer, consumer, and industrial equipment where an extension of useful battery life is desirable. MC34270 and MC34271 Features:
MC34270 MC34271
LIQUID CRYSTAL DISPLAY AND BACKLIGHT INTEGRATED CONTROLLER
SEMICONDUCTOR TECHNICAL DATA
32 1
* * * * * * *
Low Standby Bias Current of 5.0 A Uncommitted Switching Regulators Allow Both Positive and Negative Supply Voltages Logic Enable Allows Microprocessor Control of All Outputs Synchronizable to External Clock Mode Commandable for ELD and LCD Interface Frequency Synchronizable Auxiliary Output Bias Voltages Enable Load Control via N-Channel FETs
32 SW1 31 Sync 30 RT 29 Gnd 28 VA 27 Vref 26 EN1 V1 15 25 EN2 DS2 24 Ref2 23 FB2 22 Comp2 21 SS2 20 S2 19 D2 18 Mode VDD ELD V4 V3 V2 V0 16 VB 17
Rev 1
FB SUFFIX PLASTIC PACKAGE CASE 873
PIN CONNECTIONS
MOSFET is a trademark of Motorola, Inc. 1 DS1 2 Ref1
MAXIMUM RATINGS (TA = 25C, unless otherwise noted.)
Rating Input Voltage Symbol VDD Value 16 Unit Vdc
3 FB1 4 Comp1 5 SS1 6 S1 7 D1 8 Drv1
AAA A AAAAAAAAAAAAAAAAAAAAA AAA AAA A A AA AAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAA AAAA A AAAAAAAAAAAAAAAAAAAAA AAA AA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA A AAA A A A A AAA AAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA AA
Power Dissipation and Thermal Characteristics Maximum Power Dissipation Case 873 Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case Output #1 and #2 Switch Current PD 1.43 100 60 500 60 20 W RJA RJC VSL VLF TJ C/W C/W mA ISL & ISB Output #1 and #2 "Off"-State Voltage Vdc Vdc C C C Feedback Enable MOSFETs "Off"-State Voltage Operating Junction Temperature Operating Ambient Temperature Storage Temperature Range 125 TA 0 to +70 Tstg - 55 to +150
9
10
11
12
13
14
ORDERING INFORMATION
Device MC34270FB MC34271FB Operating Temperature Range TA = 0 to +70C Package QFP-32 QFP-32
(c) Motorola, Inc. 1996
MOTOROLA ANALOG IC DEVICE DATA
1
MC34270 MC34271
Representative Block Diagram
Vin SW1 32 EL Panel EL Control On/Off EN1 26 VDD D1 7 S1 6 ELD 9 8 Sync 31 RT 30 VRef 27 Ref1 FB1 Comp1 4 P Control EN2 25 V0 From DAC VB Ref2 FB2 23 22 Comp2 21 V2 14 VA = 5.0 V 28 Gnd 29 12 BIAS Output Buffers BIAS 13 V4 V3 V3 V2 15 16 V1 V0 17 VB VB 2 3 Vref 1.25 V /2 OSC ELD EN VDD VDD 11 Mode 10 D2 Circuit #2 PWM 18 19 S2 Vin
Circuit #1 PWM
Drv1
V1
V4
This device contains 350 active transistors.
2
MOTOROLA ANALOG IC DEVICE DATA
MC34270 MC34271
ELECTRICAL CHARACTERISTICS (VDD = 6.0 V, for typical values TA = Low to High [Note 1], for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted.)
Characteristic REFERENCE SECTION Reference Voltage (TJ = 25C) Line Regulation (VDD = 5.0 V to 12.5 V) Load Regulation (IO = 0 to 120 A) Total Variation (Line, Load and Temperature) ERROR AMPLIFIERS Input Offset Voltage (VCM = 1.25 V) Input Bias Current (VCM = 1.25 V) Open Loop Voltage Gain (VCM = 1.25 V, VCOMP = 2.0 V) Output Voltage Swing High State (IOH = -100 A) Low State (IOL = 100 A) BIAS VOLTAGE Voltage (VDD = 5.0 V to 12.5 V, IO = 0) OSCILLATOR AND PWM SECTIONS Total Frequency Variation Over Line and Temperature VDD = 5.0 V to 10 V, TA = 0 to 70C, RT = 169 k Duty Cycle at Each Output Maximum Minimum Sync Input Input Resistance (Vsync = 3.5 V) Minimum Sync Pulse Width OUTPUT MOSFETs Output Voltage - "On"-State (Isink = 200 mA) Output Current - "Off"-State (VOH = 40 V) Rise and Fall Times EL DISCHARGE OUTPUT (ELD) AND DRV1 Output Voltage - "On"-State (Isink = 100 A) Output Voltage - "On"-State (Isink = 50 mA) Output Voltage - "Off"-State (Isource = -100 A) Output Voltage - "Off"-State (Isource = - 50 mA) FEEDBACK ENABLE SWITCHES (DS1, DS2) Output Voltage - "Low"-State (Isink = 1.0 mA) Output Current - "Off"-State (VOH = 12.5 V) SWITCHED VDD OUTPUT (SW1) Output Voltage Switch "On" (EN1 = 1, Isource = 100 A) Switch "Off" (EN1 = 0, Isink = 100 A) AUXILIARY VOLTAGE OUTPUTS V0 Enable Switch "On"-Resistance: VB to V0 "Off"-State Leakage Current (VB = 10 V) V0 Voltage (VB = 30 V, Isource = 0 mA) V0 Resistance (Isource = 4.0 mA) Rds Ilkg V0 R0 0 0 29.5 20 2.0 0.1 29.9 40 10 2.0 30 60 A V V VswOH VswOL 5.5 0 5.9 0.1 6.0 0.2 VfeOL IfeOH - - 10 0.6 100 1.0 mV A VOL VOL VOH VOH - - VDD-0.5 VDD-3.5 30 2.0 5.9 3.3 100 2.5 - - mV V V V VOL IOH tr, tf - - - 150 0.1 50 250 1.0 - mV A ns fOSC 90 DCmax DCmin Rsync Tp 92 - 25 - 115 95 - 50 1.0 140 % - 0 100 - k s kHz VA 4.6 5.0 5.4 V VIO IIB AVOL VeOH VeOL - - 80 VA-1.5 0 1.0 120 100 4.0 - 10 600 - 5.5 1.0 mV nA dB V Vref Regline Regload Vref 1.225 - - 1.215 1.250 2.0 2.0 - 1.275 10 10 1.285 V mV mV V Symbol Min Typ Max Unit
NOTE: 1. Low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
MOTOROLA ANALOG IC DEVICE DATA
3
MC34270 MC34271
ELECTRICAL CHARACTERISTICS (continued) (VDD = 6.0 V, for typical values TA = Low to High [Note 1], for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted.)
Characteristic AUXILIARY VOLTAGE OUTPUTS V1, V2, V3, V4 Outputs 1-V1/V0 Ratio: MC34270 MC34271 1-V2/V0 Ratio: MC34270 MC34271 V3/V0 Ratio: MC34270 MC34271 V4/V0 Ratio: MC34270 MC34271 Output Resistance (Isource = 4.0 mA) Output Short Circuit Current LOGIC INPUTS (EN1, EN2, MODE) Input Low State Input High State Input Impedance SOFT START CONTROL (SS1,SS2) Charge Current (Capacitor Voltage = 1.0 V to 4.0 V) Discharge Current (Capacitor Voltage = 1.0 V) TOTAL SUPPLY CURRENT VDD Current Standby Mode (EN1 = EN2 = 0) VDD Current Backlight "On" (EN1 = 1; EN2 = 0) VDD Current LCD "On" (No Inductor) (EN1 = 0; EN2 = 1) VB Current (V0 = 35 V) VDD = 6.0 V VDD = 16 V ICC ICC ICC IO - - - - - 2.0 3.0 0.7 0.9 1.2 5.0 15 3.0 2.0 3.0 A mA mA mA Ichg Idschg 0.5 250 1.0 650 2.5 - A A VIL VIH Rin 0 2.0 25 - - 50 0.8 6.0 100 V V k 0.0565 0.0500 0.1135 0.1010 0.1135 0.1010 0.0565 0.0500 20 5.0 0.0580 0.0520 0.1160 0.1035 0.1160 0.1035 0.0580 0.0520 40 10 0.0595 0.0535 0.1185 0.1065 0.1185 0.1065 0.0595 0.0535 60 20 Symbol Min Typ Max Unit
Ro Iss
mA
NOTE: 1. Low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
Figure 1. Switch Output Duty Cycle versus Compensation Voltage
1.0 DC, SWITCH OUTPUT DUTY CYCLE 0.8 0.6 0.4 0.2 0 1.5 VDD = 6.0 V TA = 25C AVOL, OPEN LOOP VOLTAGE GAIN (dB) 100 80
Figure 2. Error Amp Open Loop Gain and Phase versus Frequency
0 VDD = 6.0 V VComp = 2.5 V RL = Open TA = 25C Phase 30 60 90 120 150 180 1000 k , EXCESS PHASE ( )
Gain 60 40 20 0
2.0
2.5
3.0
3.5
4.0
4.5
- 20 10
100
1.0 k
10 k
100 k
VComp, COMPENSATION VOLTAGE (V)
f, FREQUENCY (Hz)
4
MOTOROLA ANALOG IC DEVICE DATA
MC34270 MC34271
Figure 3. Reference Voltage Change versus Reference Current
0 Vref OUTPUT VOLTAGE DROP (mV) QUIESCENT CURRENT (mA) - 5.0 -10 VA -15 - 20 - 25 - 30 0 VDD = 6.0 V TA = 25C 1.0 2.0 3.0 4.0 5.0 2.0 1.5 1.0 0.5 0 2.0 Standby Current EN1 and EN2 = 0 RT = 169 k No Loading TA = 25C 10 12 14 16 EN1 and EN2 = 1 1.8 1.4 1.0 0.6 0.2 18
Figure 4. Quiescent Current versus Supply Voltage
2.5 2.2 STANDBY SUPPLY CURRENT ( A) Vsat , SWITCH OUTPUT SINK SATURATION (V) 70
EN1 = 1 and EN2 = 0
4.0
6.0
8.0
I, CURRENT DRAW (mA)
VDD, SUPPLY VOLTAGE (V)
Vsat, SWITCH OUTPUT SOURCE SATURATION (V)
Figure 5. FET Drain Voltage versus Sink Current
0.16
Figure 6. ELD and DRV1 Switch Output Source and Sink Saturation versus Current
0 VDD -1.0 Sink Saturation VDD = 6.0 V 1.5 TA = 25C 2.0
FET DRAIN VOLTAGE (V)
0.12
0.08
- 2.0 Source Saturation
1.0
0.04 VDD = 6.0 V TA = 25C 0 0 50 100 ID, DRAIN CURRENT (mA) 150 200
- 3.0
0.5
- 4.0 0
15
30
45
0 60
ISource, SWITCH OUTPUT CURRENT (mA)
Figure 7. Vref and VA Variation versus Temperature
OSCILLATOR FREQUENCY CHANGE (kHz) 0.30 0.25 VOLTAGE VARIATION (V) 0.20 0.15 0.10 0.05 0 Vref VDD = 6.0 V VA 8.0 6.0 4.0 2.0 0 - 2.0 - 4.0 - 6.0 - 8.0 0
Figure 8. Oscillator Frequency Variation versus Temperature
VDD = 6.0 V RT = 169 k
- 0.05 - 0.10 0 10 20 30 40 50 60 70
10
20
30
40
50
60
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
MOTOROLA ANALOG IC DEVICE DATA
5
MC34270 MC34271
Figure 9. Frequency versus Timing
1000 REFERENCE VOLTAGE (V) 5.0 4.0 3.0 2.0 1.0 0 Vref RT = 169 k TA = 25C VA
Figure 10. VA, Vref versus VDD
FREQUENCY (kHz)
VDD = 6.0 V TA = 25C 100
10
0
100 TIMING RESISTANCE (k, s)
1000
0
1.0
2.0
3.0 VDD LEVEL (V)
4.0
5.0
6.0
OPERATING DESCRIPTION
The MC34270 and MC34271 series are monolithic, fixed frequency power switching regulators specifically designed for dc to dc converter and battery powered applications. These devices operate as fixed frequency, voltage mode regulators containing all the active functions required to directly implement step-up, step-down and voltage inverting converters with a minimum number of external components. Potential markets include battery powered, handheld, automotive, computer, industrial and cost sensitive consumer products. A description of each section is given below with the representative block diagram shown in Figure 9. Oscillator The oscillator frequency is programmed by resistor RT. The charge to discharge ratio is controlled to yield a 95% maximum duty cycle at the switch outputs. During the fall time of the internal sawtooth waveform, the oscillator generates an internal blanking pulse that holds the inverting input of the AND gates high, disabling the output switching MOSFETs. The internal sawtooth waveform has a nominal peak voltage of 3.3 V and a valley voltage of 1.7 V. Pulse Width Modulators Both pulse width modulators consist of a comparator with the oscillator ramp voltage applied to the noninverting input, while the error amplifier output is applied to the inverting input. A third input to the comparator has a 0.5 mA typical current source that can be used to implement soft start. Output switch conduction is initiated when the ramp waveform is discharged to the valley voltage. As the ramp voltage increases to a voltage that exceeds the error amplifier output, the latch resets, terminating output MOSFET conduction for the duration of the oscillator ramp. This PWM/latch combination prevents multiple output pulses during a given oscillator cycle. Each PWM circuit is enabled by a logic input. When disabled, the entire block is turned off, drawing only leakage current from the power source. Shared circuits, like the reference and oscillator, can be activated by either EN1 or EN2. Circuit #1 has an ELD output which may be used to drive an LCD or backlight. Its output frequency is the oscillator frequency divided by 1024. Error Amplifiers and Reference Each error amplifier is provided with access to both inverting and noninverting inputs, and the output. The Error Amplifiers' Common Mode Input Range is 0 to 2.5 V. The amplifiers have a minimum dc voltage gain of 60 dB. The 1.25 V reference has an accuracy of 4.0% at room temperature. External loop compensation is required for converter stability. A simple low-pass filter is formed by connecting a resistive divider from the output to the error amplifier inverting input, and a series resistor-capacitor from the error amplifier output also to the to the inverting input. The step down converter is easiest to compensate for stability. The step-up and voltage inverting configurations, when operated as continuous conduction boost or flyback converters, are more difficult to compensate, and may require a lower loop design bandwidth. MOSFET Switch Outputs The output MOSFETs are designed to switch a maximum of 60 V, with a peak drain current capability of 500 mA. In circuit #1 an additional DRV1 output is provided for interfacing with an external MOSFET.The gates of the MOSFETs are held low when the circuit is disabled. Auxiliary Output Voltages Output voltages V0 through V4 are provided for use as references or bias voltages. V0 is the circuit #2 output voltage, when an internal FET switch is activated. The other auxiliary output voltages are proportional to VB. The amplifiers for V1 and V2 are powered from V0, while the amplifiers for V3 and V4 are powered from VDD.
6
MOTOROLA ANALOG IC DEVICE DATA
MC34270 MC34271
Figure 11. Representative Block Diagram Electroluminescent Backlight Configuration
SW1 32 DS1 EL Panel 1 EN1 26 8 Drv1 /2 31 Sync 169 k 30 RT 27 2 3 Brightness VB FB1 Vref 1.25 V Ref1
Circuit #1 Bias Supply En S Q R VDD
D1 7 S1 6 ELD 9 VDD 11 Mode 10 D2 VDD "On/Off"
4 Comp1 SS1 5
VDD2 Circuit #2 Bias Supply
DAC
Ref2 23 22 FB2 Comp2 21 SS2 20 DS2 24
25 EN2
VA 28 Gnd 29
BIAS
MOTOROLA ANALOG IC DEVICE DATA
II II
I I I I
/N
OSC
S Q R En VDD
18 S2 19
VB 17 V0 16 V1 15 V2 14 VDD2 V3 13 VDD2 V4 12 V4 V3 LCD Display V2 V1 V0
VB 6.0 V to 30 V
7
MC34270 MC34271
Figure 12. Auxiliary Supply Configuration
12 V SW1 32 DS1 1 EN1 26 8 Drv1 31 Sync 169 k 30 RT 27 2 3 12 V Vref 1.25 V Ref1 S R En Q D2 18 S2 19 S Q R VDD /2 Circuit #1 Bias Supply En D1 7 S1 6 ELD 9 VDD OSC Mode 10 11 VDD 5.0 V to 16 V
- 27 V
FB1
VB LCD Contrast DAC
4 Comp1 SS1 5
VDD2 Circuit #2 Bias Supply VB 17 V0 16 V1 15 V1 V0
Ref2 23 22 FB2 Comp2 21 SS2 20 DS2 24
25 EN2
VA 28 Gnd 29
BIAS
8
I I II
I I I I
/N
VDD
VB 6.0 V to 30 V
V2 14 VDD2 V3 13 VDD2 V4 12
V2
V3
LCD Display
V4
MOTOROLA ANALOG IC DEVICE DATA
MC34270 MC34271
Figure 13. MC34270 Incandescent Backlight Configuration
Vin 5.0 V to 16 V
MC34270 SW1 32 DS1 1 S Q R 26 8 Drv1 31 Sync 169 k Vref 27 2 3 30 RT Vref 1.25 V Ref1 S R En Q D2 18 S2 19 VDD /2
Circuit #1 Bias Supply En
D1 7 S1 6 ELD 9 VDD 11 Mode 10
FB1
4 Comp1 SS1 5
VDD2 Circuit #2 Bias Supply
LCD Contrast DAC
DS1 1 Ref2 23 22 FB2 Comp2 21 SS2 20 DS2 24 V1 15 25 EN2 V2 14 VA VDD2 V3 13 VDD2 V4 12 V4 V3 LCD Display V2 V1 VB 17 V0 16 V0 6.0 V to 30 V
0.1 F
28 Gnd 29
BIAS
MOTOROLA ANALOG IC DEVICE DATA
II II
I I I I
EN1
/N
OSC
VDD
9
MC34270 MC34271
Figure 14. EL PANEL Drive Circuit
Vin 6.0 V + MC34270 or MC34271 2.2 M SW1 32 Circuit #1 Bias Supply En S Q R /N VDD OSC Mode 10 D2 S R Q 18 S2 19 2.2 k EN1 26 8 Drv1 31 Sync 160 k 9.1 k 30 RT D1 7 S1 6 ELD 9 11 10 MTP3055EL 400 Hz 0.1 F 4T #36 6
10 F MR856 8 3 4T #36 5 4 120T 1 #36 7 MPSA44 120T #36 2 MR856 1.0 k 0.22 F 200 V 15 k EL PANEL
/2
8.25 k
Vref Vref 1.25 V 0.1 27 F 2 Ref1
4.3 M 15 pF 22 k 1.0 k 10 k
3 FB1
VDD2 Circuit #2 Bias Supply
MMBT2907 1
DS1 Ref2 23 22 FB2 Comp2 21 SS2 20 DS2 24 V1 15 25 EN2 V2 14 VA 28 Gnd 29 VDD2 V3 13 VDD2 V4 12 V4 V3 LCD Display V2 V1 VB 17 V0 16 V0
1.0 k VB
DAC
8.2 k
BIAS
NOTES::1. Transformer information TDK Core # PC40EEM12.7/13.7-Z Bobbin # BEPC-10-118G 2 mil gap. LP = 1.6 hy. 2. EL PANEL: DURELTM 3/SL ORANGE
10
I I I
4 Comp1 SS1 0.1 F 5
II II II
VDD
VDD
VB
MOTOROLA ANALOG IC DEVICE DATA
MC34270 MC34271
OUTLINE DIMENSIONS
FB SUFFIX PLASTIC PACKAGE CASE 873-01 L
24 25
17 16 S
D
S
0.20 (0.008) M C A-B 0.05 (0.002) A-B
-A- L
-B- B
0.20 (0.008)
M
V
H A-B
S
D
S
B P
DETAIL A
32 1 8 9
B
-D- A 0.20 (0.008) M C A-B 0.05 (0.002) A-B S 0.20 (0.008)
M S
-A-,-B-,-D- D
S
DETAIL A
H A-B
S
D
S
BASE METAL
F
M
DETAIL C J N D 0.20 (0.008)
M
CE -C-
SEATING PLANE
-H- H G M
DATUM PLANE
0.01 (0.004)
C A-B
S
D
S
SECTION B-B
VIEW ROTATED 90 CLOCKWISE MILLIMETERS MIN MAX 7.10 6.95 7.10 6.95 1.60 1.40 0.273 0.373 1.50 1.30 - 0.273 0.80 BSC 0.20 - 0.119 0.197 0.57 0.33 5.6 REF 8 6 0.119 0.135 0.40 BSC 5 10 0.15 0.25 8.85 9.15 0.15 0.25 5 11 8.85 9.15 1.0 REF INCHES MIN MAX 0.274 0.280 0.274 0.280 0.055 0.063 0.010 0.015 0.051 0.059 - 0.010 0.031 BSC 0.008 - 0.005 0.008 0.013 0.022 0.220 REF 8 6 0.005 0.005 0.016 BSC 5 10 0.006 0.010 0.348 0.360 0.006 0.010 5 11 0.348 0.360 0.039 REF
U
T -H- DATUM PLANE K X DETAIL C R
Q
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -H- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -A-, -B- AND -D- TO BE DETERMINED AT DATUM PLANE -H-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -C-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT.
DIM A B C D E F G H J K L M N P Q R S T U V X
MOTOROLA ANALOG IC DEVICE DATA
11
MC34270 MC34271
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JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
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*MC34270/D*
MOTOROLA ANALOG IC DEVICE DATA MC34270/D

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